As a novel non-volatile memory, a PCM (Phase Change Memory, phase change memory) features low power consumption, low access delay, support for bitwise access, and the like. Therefore, the PCM become increasingly popular. However, the PCM can withstand a limited quantity of write times, generally 108 to 1012 times. A service life of a PCM calculated according to an average frequency of use is approximately three years, which is shorter than that of a DRAM (Dynamic Random Access Memory, dynamic random access memory) or a disk. Therefore, people need to improve the service life of a PCM by reducing write times of the PCM.
In the prior art, the write times of a PCM can be reduced by using a DCW (Data-Comparison Write, data-comparison write) method. A basic idea behind DCW is as follows: Before data is written into a PCM, original data is read from the PCM and compared with the to-be-written data, and only different data bits are written into the PCM, so that a smallest quantity of bits are changed during one write operation, thereby reducing the write times. On the basis of using DCW, people use different algorithms to convert the to-be-written data, so as to further reduce a quantity of data bits changed during one write operation. For example, the to-be-written data is converted into one piece of or more pieces of data, by using any one of or a combination of a negation algorithm, an exclusive NOR algorithm, an exclusive OR algorithm, a cyclic shift algorithm. Data with minimum difference to the original data is found from the converted data, and then the found data is written into the PCM.
However, a bit quantity of a data flag restricts a quantity of pieces of the converted data, and different algorithms need to be configured for different bit quantities of the data flag so as to perform data conversion. For example, when a bit quantity of the data flag is 1, the negation algorithm may be used; when a bit quantity of the data flag is log2N (N is a bit width of the to-be-written data), the cyclic shift algorithm may be used; when a bit quantity of the data flag is log2N+1, the cyclic shift algorithm and the negation algorithm may be used in combination. Because different algorithms are required when bit quantities of the data flag are different, an inevitable consequence is that flexibility in performing an operation of writing data into the PCM is relatively low; in addition, it is difficult to configure corresponding algorithms for all bit quantities of the data flag.